Stop agpgart from loading

[dave52355]

Since I am not using on board graphics is there a way to prevent agpgart module from loading? (Using a PCI graphics card) Or would this be a really bad thing to do?

Thanks

[rickenbacherus]

boot: knoppix noagp

[dave52355]

Thank you!

If this works can it be made permanent?

Thanks

[Stephen]

Thank you!

If this works can it be made permanent?

Thanks

IF you save your config it will be used everytime you boot with that config.

[dave52355]

Um, I dont think I can do boot: noagp This is a HD install and it just goes into the OS. Is there a .conf I can edit?

Thanks

[Stephen]

Um, I dont think I can do boot: noagp This is a HD install and it just goes into the OS. Is there a .conf I can edit?

Thanks

Edit /etc/init.d/bootmisc.sh and add rmmod agpgart at the bottom of the file just before the : exit 0 and it will get removed every time at boot.

[dave52355]

Edit /etc/init.d/bootmisc.sh and add rmmod agpgart at the bottom of the file just before the : exit 0 and it will get removed every time at boot.

I am not able to find :exit 0 in the file. Do I need to add the rmmod agpart towards the bottom?

Thanks

[Stephen]

Edit /etc/init.d/bootmisc.sh and add rmmod agpgart at the bottom of the file just before the : exit 0 and it will get removed every time at boot.

I am not able to find :exit 0 in the file. Do I need to add the rmmod agpart towards the bottom?

Thanks

Yes just put it at the bottom of the file and it will be removed every time you boot.

[dave52355]

Nope didn't work the AGPGART still loaded and the onboard video was still detected.

Thanks

[dave52355]

I think unless I can remove the onboard video (which I cannot) or get my HD installed Knoppix 3.3 to stop detecting the onboard video I won't be able to get my GForce 4 card to work properly.

[Stephen]

I think unless I can remove the onboard video (which I cannot) or get my HD installed Knoppix 3.3 to stop detecting the onboard video I won't be able to get my GForce 4 card to work properly.

There is one more thing to try in /etc/modutils/aliases comment out the line alias char-major-10-175 agpgart and make sure that in /etc/modules the line agpgart is commented out also then update-modules to update the /etc/modules.conf then you would have to reboot to see if it works. If not I think you may have to compile a kernel without agp support and the onboard graphics would have no way to get detected with it.

[dave52355]

YES!!! That did it! Thank you! Now I don't have the onboard drivers in the way. Now instead of 5 "no more mtrrs available I'm getting 3 as my last message on dmesg right after the Nvidia driver load. Any way to up mtrrs?

All this just because the stupid Open GL screensavers would not work (and still don't)

Thanks again :D

[Stephen]

YES!!! That did it! Thank you! Now I don't have the onboard drivers in the way. Now instead of 5 "no more mtrrs available I'm getting 3 as my last message on dmesg right after the Nvidia driver load. Any way to up mtrrs?

All this just because the stupid Open GL screensavers would not work (and still don't)

Thanks again :D

Yes there is according to mtrr.txt in the kernel documentation I have read it a couple of times here I can see what they do with the example but not how to apply it to your situation I'll post it here in case someone else can figure it out perhaps you should start a new topic on mtrr's, also have you found the Nvidia forum (http://www.nvnews.net/vbulletin/index.php?s=2fabccdc31b19db8479d6ddc98269c01) yet you may be able to find something there on this.



MTRR (Memory Type Range Register) control
3 Jun 1999
Richard Gooch
<rgooch@atnf.csiro.au>

On Intel P6 family processors (Pentium Pro, Pentium II and later)
the Memory Type Range Registers (MTRRs) may be used to control
processor access to memory ranges. This is most useful when you have
a video (VGA) card on a PCI or AGP bus. Enabling write-combining
allows bus write transfers to be combined into a larger transfer
before bursting over the PCI/AGP bus. This can increase performance
of image write operations 2.5 times or more.

The Cyrix 6x86, 6x86MX and M II processors have Address Range
Registers (ARRs) which provide a similar functionality to MTRRs. For
these, the ARRs are used to emulate the MTRRs.

The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
MTRRs. These are supported. The AMD Athlon family provide 8 Intel
style MTRRs.

The Centaur C6 (WinChip) has 8 MCRs, allowing write-combining. These
are supported.

The VIA Cyrix III and VIA C3 CPUs offer 8 Intel style MTRRs.

The CONFIG_MTRR option creates a /proc/mtrr file which may be used
to manipulate your MTRRs. Typically the X server should use
this. This should have a reasonably generic interface so that
similar control registers on other processors can be easily
supported.


There are two interfaces to /proc/mtrr: one is an ASCII interface
which allows you to read and write. The other is an ioctl()
interface. The ASCII interface is meant for administration. The
ioctl() interface is meant for C programs (i.e. the X server). The
interfaces are described below, with sample commands and C code.

================================================== =============================
Reading MTRRs from the shell:

% cat /proc/mtrr
reg00: base=0x00000000 ( 0MB), size= 128MB: write-back, count=1
reg01: base=0x08000000 ( 128MB), size= 64MB: write-back, count=1
================================================== =============================
Creating MTRRs from the C-shell:
# echo "base=0xf8000000 size=0x400000 type=write-combining" >! /proc/mtrr
or if you use bash:
# echo "base=0xf8000000 size=0x400000 type=write-combining" >| /proc/mtrr

And the result thereof:
% cat /proc/mtrr
reg00: base=0x00000000 ( 0MB), size= 128MB: write-back, count=1
reg01: base=0x08000000 ( 128MB), size= 64MB: write-back, count=1
reg02: base=0xf8000000 (3968MB), size= 4MB: write-combining, count=1

This is for video RAM at base address 0xf8000000 and size 4 megabytes. To
find out your base address, you need to look at the output of your X
server, which tells you where the linear framebuffer address is. A
typical line that you may get is:

(--) S3: PCI: 968 rev 0, Linear FB @ 0xf8000000

Note that you should only use the value from the X server, as it may
move the framebuffer base address, so the only value you can trust is
that reported by the X server.

To find out the size of your framebuffer (what, you don't actually
know?), the following line will tell you:

(--) S3: videoram: 4096k

That's 4 megabytes, which is 0x400000 bytes (in hexadecimal).
A patch is being written for XFree86 which will make this automatic:
in other words the X server will manipulate /proc/mtrr using the
ioctl() interface, so users won't have to do anything. If you use a
commercial X server, lobby your vendor to add support for MTRRs.
================================================== =============================
Creating overlapping MTRRs:

%echo "base=0xfb000000 size=0x1000000 type=write-combining" >/proc/mtrr
%echo "base=0xfb000000 size=0x1000 type=uncachable" >/proc/mtrr

And the results: cat /proc/mtrr
reg00: base=0x00000000 ( 0MB), size= 64MB: write-back, count=1
reg01: base=0xfb000000 (4016MB), size= 16MB: write-combining, count=1
reg02: base=0xfb000000 (4016MB), size= 4kB: uncachable, count=1

Some cards (especially Voodoo Graphics boards) need this 4 kB area
excluded from the beginning of the region because it is used for
registers.

NOTE: You can only create type=uncachable region, if the first
region that you created is type=write-combining.
================================================== =============================
Removing MTRRs from the C-shell:
% echo "disable=2" >! /proc/mtrr
or using bash:
% echo "disable=2" >| /proc/mtrr
================================================== =====================

[dave52355]

Thanks Steven for all your help, but I think I better leave the mtrrs alone till I learn more. Now heres the scorecard:

According to XFREE86 log The Nvidia card is installed and working properly. Great!

I'm going to start a fresh thread on the screen saver issue and other kde blips hope to see you there.